Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1994-07-21
1996-07-30
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257519, 257520, 257374, H01L 2900
Patent
active
055414400
ABSTRACT:
It is an object of the present invention to provide a semiconductor device which has a high electrical isolation capability and an enhanced electrical reliability for avoiding short circuit of individual conductive layers, and the present invention also provides a method of manufacturing such a semiconductor device. An n.sup.+ buried layer and an n.sup.- epitaxial growth layer are formed on a p.sup.- silicon substrate. An element isolation oxide film having a through hole is formed on the surface of n.sup.- epitaxial growth layer. A trench which penetrates through n.sup.- epitaxial growth layer and n.sup.+ buried layer to reach a predetermined depth of p.sup.- silicon substrate is formed under through hole. A first insulating layer covers the internal wall of trench. A covering layer covers the sidewall of through hole. A filling layer is formed to fill trench so that the top surface thereof is located within through hole. A second insulating layer is formed on filling layer.
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Ikeda Tatsuhiko
Kozai Yutaka
Watabe Kiyoto
Bowers Courtney A.
Crane Sara W.
Mitsubishi Denki & Kabushiki Kaisha
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