Isolation region structure of semiconductor device and method fo

Details Isolation region structure of semiconductor device and method fo Isolation region structure of semiconductor device and method fo

1996-04-16

1997-07-08

Saadat, Mahshid D.

Fishing, trapping, and vermin destroying

437 69, 437 72, 257397, 257510, 257513, H01L 2176

Patent

active

056460520

ABSTRACT:
A method of forming a semiconductor device by concurrently forming both single-trenched small field regions and double-trench-extension large field regions, and the device so formed. The method includes: forming an insulating layer on a substrate; forming a mask layer on the insulating layer to cover only active regions such that small field regions and large field regions are left uncovered by the mask layer; increasing a thickness of the insulating layer in each field region in proportion to the width of that field region; removing all of the insulating layer in the small field regions while removing only some of the insulating layer in the large field regions so that, in width cross-section, the large field regions have an exposed substrate narrow edge-area that borders both sides of a remaining portion of the insulating layer; forming trenches in the substrate corresponding in location to the exposed substrate areas such that an intermediate-width trench is created in each small field region and such that a wide trench, having two trench-deepening extensions, is created in each large field region; putting conductive material into the trenches such that the trench-deepening extensions are filled completely and the intermediate-width trenches are at least partially filled; and converting a portion of the conductive material into an insulating cap.

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patent: 4892614 (1990-01-01), Chapman et al.

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