Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Nonlinear amplifying circuit
Reexamination Certificate
2003-07-25
2004-11-16
Nuton, My-Trang (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Nonlinear amplifying circuit
C379S093050, C330S010000
Reexamination Certificate
active
06819169
ABSTRACT:
The present invention relates to an isolation interface with a capacitive barrier comprising, at the input end of the capacitive barrier, an input circuit with differential outputs for a first and a second logical output signals that are complementary to one another and are replicas of a transmitted input signal, and a first and a second barrier capacitors for the first and the second logical signals, respectively, and, at the output end of the capacitive barrier, an output circuit with inputs for a first and a second logical signal transmitted across the capacitive barrier, the said output circuit comprising a first and a second voltage comparators. The present invention also relates to a method for transmitting a signal by means of such isolation interface.
An isolation interface renders possible data transmitting, normally in the digital form, between two or several circuits having separate supplying voltage sources. Since these circuits have no common mass connection, between them a voltage difference results, which may attain even a value of several kilovolts and may vary very fast so that the voltage difference variation rate attains the order of magnitude of 10 kV/&mgr;s.
In isolation interfaces the transient electrical currents between circuits are inhibited by means based on different physical principles.
The most common one is an optical isolation interface. An input circuit light emitting diode transforms an electrical signal into light pulses that are transformed by an output bipolar transistor back into an electrical signal. Except in the high-price range, the optical isolation interface makes possible only a relatively low data transmission rate on the level of several megahertz and the current consumption of said elements thereof is rather high.
A fast acceptance has been gained by an interface with a magnetic coupling between a magnetic loop and a magnetic field sensor. The magnetic unit can be advantageously fabricated on a single substrate for an integrated circuit; the magnetic loop is a conductive track that is, through a silicon dioxide, separated from the elements that are connected to another voltage supply; the magnetic field sensor is a magneto-resistor. A data transmission at a rate up to 50 MHz is made possible. When appropriately constructed, its current consumption is lower than that of an optical isolation interface. However, it is fabricated according to a relatively pretentious technology since the magneto-resistor is added to the integrated circuit in demanding and high-cost technological steps.
There are also known isolation interfaces using a capacitive coupling. In a basic embodiment two opposite-in-phase digital output signals U
1
o
±, being replicas of a transmitted input signal Ui, of an input circuit A
1
′ are conducted to a first plate of either barrier capacitor C′± (FIG.
1
). From their second plate digital input signals U
2
i
± are conducted to an output circuit A
2
′, at whose output a transmitted output signal Uout appears. The high and low potential of a supplying voltage source for the input circuit A
1
′ are U
1
+ and U
1
−, respectively, as well as U
2
+ and U
2
−, respectively, for the output circuit A
2
′. A second plate of either barrier capacitor C′± is through a capacitor C″± s as well as through a resistor R′±, each of said connections representing a voltage divider, namely the first one for a time varying signal and the second one for a direct voltage signal, connected to a common potential of the supplying voltage source for the output circuit A
2
′. The time development of the input signal voltage Ui with regard to the said common potential is represented in a first window of
FIG. 2
; at t=90 ns the potential difference between the supplying source for the first circuit A
1
′ and the supplying source for the second circuit A
2
′, resulting in a voltage on the capacitors C′+ and C′−, started to grow and reached the 50 V level. By a full line and a dashed line in a second and third window of
FIG. 2
there are represented time developments of the opposite-in-phase digital signals U
1
o
± and U
2
i
±. In a fourth window of
FIG. 2
, however, the transmitted output signal Uout is represented, whose frequency is equal to the frequency of the input signal Ui. Direct and low-frequency potential differences are limited in magnitude only by the break-down strength of the capacitors C′+ and C′−. The resistors R′± ensure that, as regards the magnitude, also at low frequencies the input signals U
2
i
± are always within the range of allowed input voltages for voltage comparators in the circuit A
2
′. In numerous applications, however, the described interface must also function under fast variations of the potential difference between the supplying source of the first circuit A
1
′ and the supplying source of the second circuit A
2
′. The necessary lowering of the high-frequency signals U
2
i
± is reached by an appropriate ratio of the capacitances of the capacitors C′+, C″+ and C′−, C″−, respectively. This ratio must be 1:500 if the described interface should manage a voltage difference of 1 kV at a tolerated input voltage of 2 V for the voltage comparator. Such ratio, however, also lowers the amplitude of the signal replicas U
2
i
± of the input signal Ui at the input to the circuit A
2
′ to only a few millivolts. Hereby the signal transmission rate is retarded or even made impossible because the signal amplitudes are already in the range of characteristic offset voltages of a voltage comparator. Hence, if the insensitivity to a fast variation of the potential difference between the two supplying sources is ensured by the described interface it is not possible at the same time to ensure the fastest possible data transmission.
In the U.S. Pat. No. 4,835,486 there is actually disclosed an interface provided with a capacitive coupling suitable for to a digital signal transmission up to the frequency of 1.5 MHz. A differentiating unit at the capacitive barrier is used, however, the time constant of the differentiating unit is 9 ns. So the time constant is longer than the characteristic time of variations of a signal replica at the output of a first circuit in front of the capacitive barrier and therefore the amplitude of the signal replica has to be limited by a diode limiter at an input of a circuit behind the capacitive barrier. Further, an input amplifier in the circuit behind the capacitive barrier transforms the signal pair into one single signal. Hereby the pulse width is additionally distorted since a complete symmetry in the amplifier output signal variation can never be provided for.
In the isolation interface with the capacitive coupling a limitation is immanent that no non-varying-in-time information can be transmitted thereby because of the capacitive barrier. Therefore after a switching-on or, when for a long time no change of the output signal of the circuit at the input end of the capacitive barrier has taken place, after a first change in the logical state of the output signal of the circuit at the output end of the capacitive barrier, the signal at the output end of the capacitive barrier is put into the right logical state, that is into the logical state of the said output signal.
Consequently, the technical problem to be solved by the present invention is to find such a low price interface with a capacitive barrier and a method for transmitting a signal by means of such an isolation interface that between circuits at the input end and at the output end of the capacitive barrier even the fastest data transmission will be made possible, whereat in the circuit at the input end a signal will be formed which will be the most appropriate input signal for the circuit at the output end and the transmission will be insensitiv
Kunc Vinko
Vodopivec Andrej
Jacobson & Holman PLLC
Nuton My-Trang
LandOfFree
Isolation interface with capacitive barrier and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Isolation interface with capacitive barrier and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Isolation interface with capacitive barrier and method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3359311