Isolation circuit for use in RF amplifier bias circuit

Details Isolation circuit for use in RF amplifier bias circuit Isolation circuit for use in RF amplifier bias circuit

2000-09-28

2001-12-04

Pascal, Robert (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including plural stages cascaded

C330S133000, C330S285000, C330S302000

Reexamination Certificate

active

06326849

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to RF and microwave signal amplifiers, and more particularly the invention relates to isolation and bias circuits for use in such amplifiers.
FIG. 1
illustrates a conventional multi-stage RF amplifier including bipolar transistors
10
,
12
which arc driven respectively by an input matching network
14
and an interstage matching network
16
with an output impedance matching network
18
at output transistor
12
. FETs can be used in the circuit, and additional transistor stages can be provided between transistor
10
,
12
, but a two-stage amplifier is shown for simplicity. A DC bias voltage is coupled to the base inputs of transistors
10
,
12
by bias circuits
20
,
22
which are coupled to transistor
10
,
12
, respectively through choke coils
24
,
26
. DC power is connected to the bias circuits along with a power down signal applied to pins
28
,
30
of the bias circuits.
FIG. 2
is a schematic of bias circuit
20
which includes transistors
32
,
34
with power down pin
28
connected through a resistor
36
to the base of transistor
34
and collector transistor
32
, and with the DC power pin
30
connected to the collector of transistor
34
. The emitter of transistor
32
is grounded, while the base of transistor
32
and emitter of transistor
34
are coupled through choke coil
24
to the base of transistor
10
. The RF signal is connected to the base of transistor through pin
38
. A capacitor
40
connects coil
24
to ground.
A large RF choke has a high inductance and often a high resistance value. Further, a large capacitance value is often not feasible, especially in MMIC/RFIC circuits where chip area must be minimized. Consequently, the choke may not provide enough insulation of the RF signal from entering the bias circuit and the power supply. Thus, the DC power supply path to the bias circuit can become an RF leakage path and an undesirable RF feedback loop.
The present invention is directed to reducing the undesired RF leakage in a feedback loop through the DC power supply.
SUMMARY OF THE INVENTION
In accordance with the invention, an isolation circuit is included in the bias circuitry for an RF transistor stage to reduce RF signal leakage from the transistor in a feedback loop through the bias circuit and power supply. The isolation circuit allows DC current to flow into the bias circuit but presents an impedance to RF signals. Thus, the serial path of the isolation circuit can comprise an inductor or a parallel inductive-capacitive circuit resonating at the operating RF frequency. A shunt capacitor or a shunt inductive-capacitive series circuit provides a low impedance path to ground for RF signals. A multi-section isolation circuit can be used.
The isolation circuit reduces the RF leakage and feedback, thereby resulting in a more stable amplifier operation against temperature and frequency. Further, more stable gain and linearity along with improved frequency response are realized over temperature with the isolation circuit.
The invention and objects and features thereof will be more readily apparent from the following detailed description and appended claims when taken with the drawings.


REFERENCES:
patent: 5532646 (1996-07-01), Aihara
patent: 5726606 (1998-03-01), Marland
patent: 5942946 (1999-08-01), Su et al.
patent: 5994964 (1999-11-01), Tanemura
patent: 6052029 (2000-04-01), Uda et al.
patent: 6188283 (2001-02-01), Hagio et al.

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