Isolating a CDAC array in a current integrating ADC

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341163, H03M 150

Patent

active

053673026

ABSTRACT:
A current integrating analog-to-digital converter includes a comparator having a non-inverting input coupled to receive a ground voltage and an inverting input coupled to an input conductor, with an input current flowing through the input conductor, an integrating capacitor having a first terminal coupled by an isolation switch to the input conductor. A reset circuit is coupled to the integrating capacitor and is operative to reset the integrating capacitor before each integrating cycle. A digital-to-analog converter, which may be a CDAC, has an output coupled to a second terminal of the integrating capacitor, which may constitute the capacitors of the CDAC. An input of a tracking circuit is coupled to an output of the comparator to produce digital signals on digital inputs of the digital-to-analog converter to maintain the input of the comparator close to a virtual ground voltage, a digital signal on the inputs of the digital-to-analog converter representing the integral of the input current. The isolation switch opens during transients occurring on a charge summing conductor during digital-to-analog converter update and reset operations. An internal reset switch is coupled between a reference conductor and the first level. An external switch is coupled between ground and the input conductor.

REFERENCES:
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patent: 4876544 (1989-10-01), Kuraishi
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patent: 5117227 (1992-05-01), Goeke
"A Two-Stage Weighted Capacitor Network for D/A-A/D Conversion", by Y. S. Yee, L. M. Terman, and L. G. Heller, IEEE Journal of Solid-State Circuits, vol. SC-14, No. 4, Aug., 1979.

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