Ventilation – Clean room
Reexamination Certificate
1998-11-10
2001-02-06
Joyce, Harold (Department: 3744)
Ventilation
Clean room
C198S346100, C414S940000
Reexamination Certificate
active
06183358
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor fabrication facility and, more specifically, to such a facility which requires reduced clean room area, less cumbersome working conditions for the operators and reduced ultimate fabrication costs.
2. Brief Description of the Prior Art
Semiconductor fabrication facilities generally require that all process steps wherein the semiconductor wafer can be exposed to external contaminants be conducted in a “clean” atmosphere to avoid or at least minimize the likelihood that such contaminants ultimately reside on the wafer itself The degree of cleanliness required has become more acute as the dimensions of the components on the wafer decreased with time because this decrease in dimensions enables continually smaller contaminants to be capable of causing irreparable damage to the semiconductor devices being fabricated. In order to provide the required degree of cleanliness, it has been necessary to enclose the processing equipment in “clean” rooms with the degree of cleanliness being required to meet certain specified standards as is well known in the art. The fabrication tools are located throughout the “clean” room and operators wearing special garments are required to transport batches of semiconductor wafers from fabrication tool to fabrication tool within the “clean” rooms up to encapsulation of the device at which time the device can be removed from the “clean” room since it is no longer subject to possible contamination. Each fabrication tool has its own support skid attached thereto which includes items such as RF power supplies, vacuum pumps, gas cylinders, etc. These clean rooms require specified air circulation and filtering as well as zones above and below the “clean” room floor and ceiling for additional cleanliness protection, this requiring essentially three floors. Also, the personnel within the clean room are required to wear special gowns to further avoid introduction of contaminants into the “clean” room. These requirements include the use of a great deal of space for the equipment and operators, provide cumbersome working conditions for the operators in that special garments must be worn and require significant cost to maintain the large “clean” room ambient volume at the required level of cleanliness. Typical prior art semiconductor fabrication facilities are discussed in the U.S. Pat. No. 5,344,365.
SUMMARY OF THE INVENTION
In accordance with the present invention, the above described problems of the prior art are minimized and there is provided a semiconductor fabrication facility which substantially minimizes the clean room volume and permits the operators to function either entirely or to a minimal degree out of the “clean” room environment, thereby minimizing the cost of maintaining the “clean” room conditions and permitting the facility operators to function without wearing special garments which may be cumbersome and undesirable and a possible impediment to operation of the facility.
Briefly, the above is accomplished by providing a bi-directional continually recirculating conveyor wherein the wafers travel along one side of the conveyor from a point of entry to the end of the conveyor and then return toward and possibly up to the point of entry along an opposing side of the conveyor. Only the region or corridor occupied by the conveyor requires “clean” room conditions with operators able to be located out of the “clean” room region and capable of operation on the wafers traveling along the conveyor by robotics and the like without entry into the clean room area. This permits the operators to wear standard clothing to suit the conditions and to be capable of operating without impediment resulting from the garment being worn. Tools are positioned along both sides of the conveyor so that operations can be performed on the wafers during both forward and reverse travel directions along the conveyor to conserve space. The conveyor preferably takes a serpentine shape to permit such disposition of tools on both sides of the conveyor while minimizing the total area requirement of the conveyor to a relatively compact area.
The “clean” room or, more accurately “clean corridor” conditions are provided by enclosing only the conveyor and the region thereabove and therebelow, preferably down to the room floor. Fresh air enters the top of the enclosed region, preferably at spaced points along the enclosed region, and is forced by fans through a filter of required type to remove contaminants. The filtered air then passes through the conveyor, which is preferably an air transmissive belt or the like, such as, for example, a perforated belt, whereby the filtered air can pass through the conveyor to the “clean” corridor region below the belt and pass out into the ambient atmosphere external of the “clean” corridor region. Since there is a pressure above the ambient pressure within the “clean” corridor region, the filtered air will be forced out of the “clean” corridor region by the pressure within the “clean” corridor region. This results in a constant recirculation of filtered air through the “clean” corridor region with the “clean” corridor being disposed on a single floor level rather than the three floor levels required by the prior art.
In operation, a load of wafers is placed into the system at one end of the conveyor within the “clean” corridor region and the recipe for fabrication of devices on that wafer can be entered into the system to determine the operations to be performed on the wafer during its travel along the conveyor. The wafer are then transported along the conveyor from station to station whereat the programmed operations are performed on the wafers either by machine robot and/or by human operator, if required, either on the conveyor or by removing the wafer from the conveyor to a tool which maintains “clean” corridor condition, whereat an operation is performed on the wafer with the wafer then being returned to the conveyor for transport to the next operation. The wafers continue along the conveyor to the end of the conveyor and then return along an adjacent path of the conveyor but in the opposite direction while further processing operations are performed on the wafer during its travel in the opposite direction. When the wafer returns to the original point of entry into the “clean” corridor environment or some other point in its travel path on the conveyor, the processing will be completed to the extent that “clean” corridor conditions are no longer required. At this point, the wafer or devices formed from the wafer can be removed from the conveyor for final operation thereon, if required.
It can be seen that the entire fabrication facility is provided using minimum floor area with the required “clean” corridor region being minimized to cover only the area covered by the fabrication equipment and a region thereabove and therebelow. Operators can operate within the “clean” corridor region without entry into the “clean” corridor region, thereby eliminating the requirement of wearing special garments or the like. In general, the operators required only for placement of virgin wafers into the system and for removal of processed wafers and/or devices from the system.
As a further embodiment of the invention, a plurality of conveyors systems can be installed on additional floors. This multi-floor installation allows each floor to operate independently from the others. In other words, an interruption on one floor does not interrupt production on the other floors. This is a risk reduction factor.
REFERENCES:
patent: 4805759 (1989-02-01), Rochet et al.
patent: 4926753 (1990-05-01), Weiss
patent: 5487768 (1996-01-01), Zytka et al.
patent: 5725664 (1998-03-01), Nambu et al.
patent: 5833726 (1998-11-01), Kinkead et al.
Brady III Wade James
Joyce Harold
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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