Isolated multi-chip devices

Details Isolated multi-chip devices Isolated multi-chip devices

1993-05-05

2000-08-22

Jones, Deborah

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

257686, 438758, 428458, H01L 2358, H01L 23522, H01L 23485, B32B 1508

Patent

active

061076740

ABSTRACT:
A semiconductor device structure in which a power semiconductor device is used as the substrate for the structure. Initially, a first metallization layer is formed on the power semiconductor device. Then, a dielectric passivation layer is formed over the first metallization layer, the dielectric passivation layer having apertures through which the first metallization layer may be accessed. A polymer passivation layer is then formed on the dielectric passivation layer, the polymer passivation layer also having apertures through which the first metallization layer and the dielectric passivation layer may be accessed. A second metallization layer is then formed on the polymer passivation layer to which at least one electronic component is connected. In specific embodiments, the polymer passivation layer includes polyimide.

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