Isk receiver

Details Isk receiver Isk receiver

1992-07-30

1995-03-21

Chin, Stephen

Pulse or digital communications

Repeaters

Testing

375 94, H04L 2714

Patent

active

054003652

ABSTRACT:
A class message receiver that in one embodiment can be implemented in a Digital Signal Processor. An FSK demodulator takes input linear samples of the signal and filters them with a bandpass filter which does an upsampling to increase the sampling rate from 8,000 Hz to 24,000 Hz, which results in 20 samples at the output of the bandpass filter for each incoming data bit. The amplitude of the signal/samples at the output of the bandpass filter is adjusted by an automatic gain control (AGC) circuit and the resulting samples (for convenience referred as sample (t), where t is a discrete moment in time) are processed along two different paths designed to estimate the likelihood of the input signal encoding a mark (mark estimation path) or a space (space estimation path).

REFERENCES:
patent: 4291275 (1981-09-01), Nossen
patent: 4568882 (1986-02-01), Single
patent: 4752742 (1988-06-01), Akaiwa

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