Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
2000-06-26
2002-03-05
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S065000
Reexamination Certificate
active
06353343
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention applies to the field of integrated circuits (IC) known as differential receivers. It is specific to IC devices used for receiving digital data that is transmitted over long transmission lines. The field includes all bipolar differential receivers and all insulated gate field effect transistor (IGFET) differential receivers, including CMOS circuits.
2. Background Information
When digital data signals that contain long runs of either ones or zeroes are sent over a long transmission line, the edges that correspond to the data transitions (0-1 or 1-0) become severely distorted by the bandwidth limitation and the frequency dispersion of the transmission line. This phenomenon, known as inter-symbol interference (ISI), moves the transition edges associated with these long runs from their ideal clock positions thus interfering with the correct recovery of data by the receiver.
The prior art in differential receivers does not provide a solution to this problem that is implemented at the receiver. Lacking a solution at the receivers, data transmission system designers have taken a system approach to mitigate the problem of ISI. In the systems approach, designers have used a technique called “pre-emphasis” in the driver circuit. For example, the transmission line driver asserts a 1-0 transition level that is stronger than a sustained 1-1 data level, and it asserts a 0-1 transition level that is stronger than a sustained 0-0 data level. These emphasized transitions tend to compensate for the anticipated distortion of the pulses that follow long high or long low bit sequences. The “pre-emphasis” system solution to the ISI problem complicates transmission system designs. Designers prefer a solution that is implemented at the differential receiver for use in systems where they have no control over the driver choice. As data transmission rates rise, ISI becomes even more problematic since high-speed circuits have decreased margins for timing errors. In these higher speed systems, both the driver and the receiver must be capable of addressing the ISI problem.
ISI creates data errors at the receiver by causing pulse width distortion that shifts the transition edges for the bits at the end of a long run of either ones or zeroes.
FIG. 1
illustrates an oscilloscope plot of a differential “1111101010” bit pattern after transmission through 20 meters of cable. The prior art differential receiver generates output pulse transitions at the points where the two waveforms cross. Ideally, these data transitions should occur every 941 picoseconds (ps). However, because of ISI, the “11111” run pattern has a length of 4950 ps instead of the ideal value of 4705 ps. In addition, the “01010” pulses following the “11111” run also have distorted widths of ~625 ps, ~1200 ps, ~750 ps, ~1150 ps and ~750 ps, respectively, instead of the ideal value of 941 ps. Prior art differential receivers would produce output pulses with these same pulse width distortions.
FIG. 2
illustrates the prior art in digital differential receivers. The circuit consists of two matched bipolar transistors (or IGFET), T
1
and T
1
′, connected in common at their emitters (or sources) to a current source I
T
. The collector (or drain) of each transistor is connected to the supply voltage V
cc
through matched load resistors R
L
and R
L
′. The differential inputs v
a
and v
b
are applied at the base (or gate) of each transistor. The differential outputs v
oa
and v
ob
are taken from the collector (or drain) of each transistor. Each time that the differential signal reaches zero, a transition occurs between the high and the low states of each of the outputs v
oa
and v
ob
relative to supply ground. If v
a
is greater than v
b
as the differential input approaches zero then the transition is in one direction. When v
a
is less than v
b
approaching a zero then the transition is in the opposite direction. The polarity of a transition at v
oa
is the opposite of that at v
ob
.
SUMMARY OF THE INVENTION
The invention provides an advancement of the art in differential receiver integrated circuits because it implements rejection of ISI at the receiver. Prior art differential receivers generate output pulses whose widths are affected by the preceding data. The ISI-rejecting differential receiver does not, so high levels of ISI in the input signal are rejected. For many digital data transmission systems this new type of differential receiver IC can provide sufficient ISI rejection to eliminate the need for “pre-emphasis” at the driver. It also enables still higher data transmission speeds since it allows the mitigating technique of “driver pre-emphasis” to be combined with ISI rejection at the receiver. The invention applies to all bipolar (n-p-n or p-n-p) technologies and to all IGFET (p-channel or n-channel) technologies, including CMOS.
A primary differential transistor pair is augmented with a secondary (weaker) transistor pair and a pair of filter networks. These components combine the signals from both sides of the difference circuit to create a high pass “shelf” filter between the differential input and the outputs. At low frequencies, the dual-pair network reduces the gain of the differential amplifier. At high frequencies, the gains of the two pairs add. The break frequency for the gain change is set by an RC time constant of the network. The ratio of input device sizes and resistor ratios in the network determine the difference between the minimum gain and the maximum gain.
REFERENCES:
patent: 5371475 (1994-12-01), Brown
patent: 5625318 (1997-04-01), Sevenhans et al.
patent: 6208134 (2001-03-01), Demma
Noakes Scott H.
Payne Robert Floyd
Brady III W. James
Hernandez Pedro P.
Lam Tuan T.
Nguyen Hiep
Telecky , Jr. Frederick J.
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