ISI cancellation equalizer

Details ISI cancellation equalizer ISI cancellation equalizer

2011-01-11

2011-01-11

Kim, Kevin Y (Department: 2611)

Pulse or digital communications

Equalizers

Reexamination Certificate

active

07869496

ABSTRACT:
An ISI cancellation equalizer is disclosed. The ISI cancellation equalizer comprises a non-linear mapping circuit, a filter, a delay circuit, and a combiner. The non-linear mapping circuit generates a mapped signal by mapping a level of an input signal into a predetermined value when the input signal falls in a predetermined region, and linearly maps the level of the input signal when the level of the input signal is beyond the predetermined region. The filter depresses an inter-symbol interference (ISI) in the mapped signal to generate a filtered signal. The delay circuit filters the high boosted signal to generate a delayed signal. The combiner combines the filtered signal and the delayed signal to obtain an equalized signal.

REFERENCES:
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patent: 6414989 (2002-07-01), Olafsson et al.
patent: 6816547 (2004-11-01), Kuribayashi
patent: 7330408 (2008-02-01), Sergey et al.
patent: 2004/0170103 (2004-09-01), Sergey et al.

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