ISDN device line protection circuit

Details ISDN device line protection circuit ISDN device line protection circuit

1990-02-06

1995-03-07

DeBoer, Todd E.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Impedance insertion

361111, H02H 900

Patent

active

053963946

ABSTRACT:
A line protection circuit for an ISDN device includes a pair of identical, NMOS field effect transistors connected between the device and opposite terminals of one winding of an isolation transformer. Each device has one N region connected to an output line from the ISDN device, a second N region connected to one winding terminal, a grounded channel or P region and a gate connected to a source of positive logic voltage. During normal operation, the FETs pass current provided by a constant current source within the ISDN device without attenuation. If a power surge occurs elsewhere in the ISDN network, the voltage at one of the FETs is be clamped to ground while the voltage at the other FET rises only until FET cut-off occurs. If power is removed from the FETs, at least one PN junction will always be reverse biased to isolate the protected ISDN device from the remainder of the network.

REFERENCES:
patent: 3947727 (1976-03-01), Stewart
patent: 4930037 (1990-05-01), Woo

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