Semiconductor device manufacturing: process – Making passive device – Resistor
Patent
1998-05-29
2000-03-21
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making passive device
Resistor
438384, H01L 218244
Patent
active
06040227&
ABSTRACT:
The present invention provides a method of inter-poly oxide (IPO) layer underlying a polysilicon resistor in a memory product. The IPO layer 15 is formed by a modified low pressure SACVD-O.sub.3 -TEOS process that gives the IPO layer a smoother surface and good planarization. This IPO layer gives the overlying polysilicon resistors a more uniform resistance. The method begins by providing a semiconductor structure 10. Next, in an important step, an inter-poly oxide (IPO) layer 11 is formed using low pressure ozone assisted sub-atmospheric chemical vapor deposition (SACVD O.sub.3 -TEOS) process at a pressure between about 20 and 150 torr. A polysilicon resistor 15 is then formed on said inter-poly oxide (IPO) layer. The memory device is completed by forming passivation and conductive layers thereover.
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Chen Lung
Lin Yi-Miaw
Wuu Shou-Gwo
Yaung Dun-Nian
Ackerman Stephen B.
Chaudhari Chandra
Saile George O.
Stoffel William J.
Taiwan Semiconductor Manufacturing Company
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