IPG transistor semiconductor integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

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257195, 257276, H01L 2980

Patent

active

054499291

ABSTRACT:
A method of producing on a substrate an in-plane-gate transistor includes producing a channel portion in which a quasi-one-dimensional conductive channel electrically connecting a source region and a drain region is generated and producing gate portions, each portion including a gate electrode layer for controlling generation and forfeiture of the quasi-one-dimensional conductive channel so that an upper surface of the gate layer and the quasi-one-dimensional conductive channel are positioned substantially in the same plane, on both sides of the channel portion on the substrate. Gaps between the channel portion and the gate portions are controlled by side walls produced self-aligningly on the side wall surfaces of the channel portion. Thus, gaps of a high aspect ratio can be produced between the channel portion and the gate portions without being limited by the dry etching technique.

REFERENCES:
patent: 4989052 (1991-01-01), Okada et al.
patent: 4999682 (1991-03-01), Xu et al.
patent: 5185534 (1993-02-01), Sakamoto et al.
patent: 5270556 (1993-12-01), Shimura
Glazman et al., "Lateral Position Control of an Electron Channel in a Split-Gate Device", Semiconductor Science Technology 6 (1991) pp. 32-35.
Nieder et al, "One-Dimensional Lateral-Field-Effect Transistor With Trench Gate-Channel Insulation", Applied Physics Letters, vol. 57, No. 25, Dec. 1990, pp. 2695-2697.

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