Electrical computers and digital processing systems: multicomput – Computer-to-computer direct memory accessing
Reexamination Certificate
2011-01-11
2011-01-11
Walsh, John B. (Department: 2451)
Electrical computers and digital processing systems: multicomput
Computer-to-computer direct memory accessing
C709S250000, C710S022000
Reexamination Certificate
active
07870217
ABSTRACT:
An IP Storage processor and processing engines for use in the IP storage processor is disclosed. The IP Storage processor uses an architecture that may provide capabilities to transport and process Internet Protocol (IP) packets from Layer 2 through transport protocol layer and may also perform packet inspection through Layer 7. The engines may perform pass-through packet classification, policy processing and/or security processing enabling packet streaming through the architecture at nearly the full line rate. A scheduler schedules packets to packet processors for processing. An internal memory or local session database cache may store a transport protocol session information database and/or store a storage information session database, for a certain number of active sessions. The session information that is not in the internal memory is stored and retrieved to/from an additional memory. An application running on an initiator or target can in certain instantiations register a region of memory, which is made available to its peer(s) for access directly without substantial host intervention through RDMA data transfer.
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Armstrong Teasdale LLP
Walsh John B.
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