IP routing lookup scheme and system for multi-gigabit...

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing

Reexamination Certificate

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C370S254000, C707S793000

Reexamination Certificate

active

06963924

ABSTRACT:
An IP routing lookup scheme and system for a multi-gigabit switching router which can reach 3 memory accesses in the worst case using memory size less than 512 KB is disclosed. The invention can compress a routing table with 40,000 routing entries into a forwarding table of 450–470 Kbytes. According to the present invention, a segmentation table storage device stores a next hop or a pointer for looking up a next hop for an incoming packet having prefix length less than or equal to 16 bits. The Next Hop Array storage device is for storing the next hops for a packet having prefix length larger than 16 bits and offset length less than or equal to 3 bits. A Compressed Next Hop Array storage device is encoded and decoded according to a Code Word Array storage device. The Compressed Next Hop Array storage device stores next hops for the incoming packet having prefix length larger than 16 bits and offset length larger than 3 bits. Thus, in the worst case, an output port for a route prefix can be found in 3 memory accesses.

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Gupta et al., “Routing Lookups in Hardware at Memory Access Speeds,” Apr. 1998, Seventeenty Annual Joint Conference of the IEEE Computer and Communications Societies, IEEE, vol. 3, pp. 1240-1247.
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