1978-07-05
1981-01-27
Wojciechowicz, Edward J.
357 41, 357 47, 357 90, 357 91, H01L 2704
Patent
active
042478626
ABSTRACT:
A structure and method for preventing minority carriers caused by an alpha particle, or the like, from drifting into storage regions and causing a false data bit. In a high density MOS circuit, a single alpha particle including one originating within the substrate or circuit package can generate enough carriers to give a false data bit. A minority carrier reflective barrier is employed to prevent substantial numbers of minority carriers from drifting into the active layer. In the presently preferred embodiment, this barrier is formed by ion implanting the upper surface of the substrate.
REFERENCES:
patent: 4113513 (1978-09-01), de Brebisson
Intel Corporation
Wojciechowicz Edward J.
LandOfFree
Ionization resistant MOS structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Ionization resistant MOS structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Ionization resistant MOS structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1184605