1981-03-13
1987-08-04
Carroll, J.
357 231, 357 88, 357 91, H01L 2978, H01L 2702
Patent
active
046849718
ABSTRACT:
A CMOS structure and method of manufacture are disclosed for achieving a high packing density in integrated circuits. Each device includes at least one high concentration surface region, (18 and 20) and at least one lower concentration background region (15 and 17) which permit the devices to be made close together. The devices can be fabricated with a single mask by using a lift-off technique in accordance with the method of the invention.
REFERENCES:
patent: 3821781 (1974-06-01), Chang et al.
patent: 4067100 (1978-01-01), Kojima et al.
patent: 4212100 (1980-07-01), Paivinen et al.
patent: 4217149 (1980-08-01), Sawazaki
patent: 4231055 (1980-10-01), Iizuka
American Telephone and Telegraph Company AT&T Bell Laboratories
Birnbaum Lester H.
Carroll J.
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