Ion implantation with multiple concentration levels

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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C438S401000, C438S527000, C438S528000, C438S532000, C438S548000, C438S549000, C438S552000, C438S944000, C438S948000, C257SE21036, C257SE21039, C257SE21058, C257SE21023

Reexamination Certificate

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07495347

ABSTRACT:
A method that includes providing a semiconductor substrate having a mask on a surface thereof. The mask includes a first region having no masking elements and a second region having a plurality of masking elements. Each of the plurality of masking elements has a dimension that is equal to a first length, the first length less than twice a diffusion length of a dopant. The method further includes bombarding the semiconductor substrate and masking element with ions of the dopant. The ions form a first impurity concentration in the first region and a second impurity concentration in the second region.

REFERENCES:
patent: 4446613 (1984-05-01), Beinglass et al.
patent: 4653176 (1987-03-01), Van Ommen
patent: 5973361 (1999-10-01), Hshieh et al.
patent: 6261918 (2001-07-01), So

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