Inverter circuits using insulated gate field effect transistors

Details Inverter circuits using insulated gate field effect transistors Inverter circuits using insulated gate field effect transistors

1980-04-11

1983-05-17

Anagnos, Larry N.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

307270, 307443, 307446, 307451, 3151694, G09G 328, H03K 19094

Patent

active

043842879

ABSTRACT:
An inverter circuit comprises a pair of N- and P-channel insulated gate field effect transistors coupled in series. One of the transistors is used as a load transistor and the other is used as a drive transistor. A diode is connected between the source and gate electrodes of the load transistor in order to hold the gate voltage of the load transistor. A resistor and a capacitor (having a larger capcitance than the gate capacitance of the load transistor) is connected to the gate electrode of the load transistor. In operation, a high voltage is applied to the source electrode of the load transistor. A low-voltage pulse, having a period shorter than the RC time constant of the resistor and capacitor, is applied through the capacitor to the gate electrode of the load transistor. The gate electrode of the drive transistor is supplied with a low-voltage input signal (having a phase which is the same as and not longer than the period of the pulse applied to the capacitor). An input pulse signal may be used as the low-voltage pulse which is applied to the capacitor.

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