Inverter circuit and balanced input inverter circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S537000, C327S107000, C327S166000, C327S176000, C257S368000, C257S351000, C257S371000, C257S373000

Reexamination Certificate

active

07847616

ABSTRACT:
A balanced input inverter circuit includes a first P-type MOS transistor including a gate terminal connected to an input, a source terminal connected to a first power source potential, and a drain terminal connected to an output, a first N-type MOS transistor including a gate terminal connected to the input, a drain terminal connected to the output, and a source terminal connected to a second power source potential, a first inverter circuit including an input terminal connected to an inverted input, and an output terminal connected to a back gate terminal of the first N-type MOS transistor, a first diode connected between the first power source potential and a first power source terminal of the first inverter circuit, a second inverter circuit including an input terminal connected to the inverted input, and an output terminal connected to a back gate terminal of the first P-type MOS transistor, and a second diode connected between the second power source potential and a second power source terminal of the second inverter circuit.

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Patent Abstract of Japan, Publication No. 09-055439, published date: Feb. 25, 1997.
International Search Report for PCT/JP2007/055510, mailed Jun. 19, 2007.

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