Inverted amplifying circuit

Details Inverted amplifying circuit Inverted amplifying circuit

1997-05-20

1999-08-10

Mullins, James B.

Amplifiers

With periodic switching input-output

330 51, 330107, 330294, 327562, H03F 134

Patent

active

059364637

ABSTRACT:
An stable inverted amplifying circuit includes an odd number of CMOS inverters and a feedback capacitance. Balancing resistances decrease the inverter open gain and limit the gain of the entire circuit. Serial capacitances act to prevent low-frequency oscillation. Oscillation-preventing circuits are also provided to reduce high-frequency oscillation. Sleep, refresh, and sleep-refresh switches are used to cancel residual loads and reduce power consumption.

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Harald Parzhuber and Wolfgang Steinhagen, "An Adaptive Biasing One-Stage CMOS Operational Amplifier for Driving High Capacitive Loads", IEEE Journal of Solid-State Circuits, vol. 26, No. 10, Oct. 1991, pp. 1457-1460.
Richard A. Rikoski and Mario Dianora, "A Micropower Complementary-MOS d.c. amplifier", Internat'l Journal of Electronics, vol. 40, No. 3, Mar. 1976, London GB, pp. 237-240.
C. Azerdo Leme, T. Boltshauser and H. Baltes, "CMOS Absolute Value Precision Capacitance Measurement System", Internat'l Symposium on Circuits and Systems, May 10, 1992, Institute of Electrical and Electronics Engineers, pp. 1277-1279.

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