Inverse planar transistor

Details Inverse planar transistor Inverse planar transistor

1976-12-10

1978-08-15

Miller, Jr., Stanley D.

357 35, 357 44, 357 46, 357 92, H01L 2948

Patent

active

041077199

ABSTRACT:
This invention relates to an inverse planar transistor in which a base region of one conductivity type is formed in a semiconductor body of the opposite conductivity type adjacent a planar surface thereof. The collector of the transistor is provided by a Schottky contact on a portion of the outer face of the base region. A highly doped protective ring of the opposite conductivity type to that of the base region is provided for the Schottky contact. An enlarged thickness of the passivation layer adjacent the opening therethrough to provide an effective guard ring. A relatively highly doped buried layer of said opposite conductivity type is located in the semiconductor body below and spaced from the inner surface of the base region. The portion of the semiconductor body lying between the base region and the buried layer together with the buried layer form the emitter of the transistor. A highly doped region of the said opposite conductivity type extends from the planar surface to the buried layer. A layer of insulating material covers the planar surface except where contacts extend therethrough. A guard ring of the first impurity type extends around the transistor. The doping concentration across the base region from the planar surface is at first approximately 5 .times. 10.sup.16 cm.sup.-3 and then rises to approximately 5 .times. 10.sup.17 cm.sup.-3, which is reached at a distance of approximately 0.2 microns from the surface. It then falls off until the base-emitter junction is reached. The emitter zone portion interfaced with the base region has a doping concentration of less than 10.sup.16 cm.sup.-3. At a depth of 1.0 microns from the planar surface it greatly increases because of the highly doped buried layer.

REFERENCES:
patent: 3995301 (1976-11-01), Magdo
R. N. Noyce et al., "Schottky Diodes Make IC Scene," Electronics, Jul. 21, 1969, pp. 74-80.
Hodges, "Low-Power Bipolar Transistor Memory Cells," IEEE Journal of Solid-State Circuits, vol. SC-4, No. 5, Oct. 1969.
Anantha et al., "Planar Mesa Schottky Barrier Diode," IBM J. Res. Develop, Nov. 1971, pp. 442-445.

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