Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Patent
1994-12-13
1997-06-17
Saadat, Mahshid D.
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
257641, 257650, 257771, H01L 2358, H01L 23544, H01L 2348
Patent
active
056400535
ABSTRACT:
A method for forming an alignment mark during semiconductor device manufacturing. A first area and a second area are provided on the semiconductor substrate wherein the second area is adjacent to the first area. An alignment mark is formed in the first area. A first layer is formed over the first area and the second area wherein the alignment mark is replicated in the first layer. The first layer is then removed from the second area and left over the first area. A globally planarized second layer, is formed over the first area and the second area. The second layer is then removed from the first area and is left over the second area.
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Clark Jhihan B.
Cypress Semiconductor Corp.
Saadat Mahshid D.
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