Inverse modified discrete cosine transform signal transforming s

Pulse or digital communications – Receivers – Particular pulse demodulator or detector

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36472501, H04B 1400

Patent

active

056469608

ABSTRACT:
An MDCT calculating circuit includes an x.sub.01 calculating circuit for multiplying input signals with a forward transforming window and a linear forward transforming unit for linear forward transforming an output signal of the calculating circuit. The linear forward transforming unit includes an x.sub.02 calculating circuit and an x.sub.03 calculating circuit for pre-processing the output signal of the x.sub.01 calculating circuit and an integration and summation processing circuit for executing integration and summation processing operations on an output signal of the pre-processing unit. The integration and summation processing circuit executes an integration and summation operation on an N/2 number of input signals from the pre-processing unit by grouping a k number of input signals as a processing unit and iteratively executes the integration and summation processing operations a N/(2*K) number of times for outputting a sum total of N/2 number of signals.

REFERENCES:
patent: 5218561 (1993-06-01), Iwadare
patent: 5311549 (1994-05-01), Mahieux
patent: 5349549 (1994-09-01), Tsutsui
E.O. Bringham, "Fast Fourier Transform," transl. by Miyagawa and Imai, pp. 196-198.
F. Hazu et al., "Adaptive Transform Coding with an Adaptive Block Size (ATC-ABS) using MDCT," Extended Abstracts in Spring Meeting of Japan Society of Electronic Information Communication 1990, A-197.
M. Iwadare et al., "On a Modified Discrete Cosine Transform (MDCT) and its Fast Algorithm," C&C Systems Research Laboratories, NEC Corporation, CAS90-9, DSP90-13, pp. 49-54.
T. Mochizuki et al., "Constraint Conditions for Multiple-Blocksize Modified-DCT," C&C Systems Research Laboratories, NEC Corporation, CAS90-10, DSP90-14, pp. 55-60.

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