Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
1999-04-07
2001-12-04
Mai, Tan V. (Department: 2121)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S402000
Reexamination Certificate
active
06327602
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an inverse discrete cosine transforming apparatus in an MPEG decoder, more particularly to an inverse discrete cosine transforming apparatus for carrying out an inverse discrete cosine transform(IDCT) of a 8×8 data block, which is satisfied by the MP@ML requirements of an MPEG(Moving Picture Experts Group) and CCIR 601 specification.
BACKGROUND OF THE RELATED ART
MPEG is a name of an international organization for standardization of digital signal compression. Although they started discussing about MPEG in 1988, just a few experts recognized the term until the research of HDTV were activated in early 90's.
Today, realizing devices using MPEG moving picture compressing method such as DVD,digital TV, the term MPEG became common. In this multimedia era, anyone with a little interests in the field easily can hear or see the term, MPEG.
The MPEG became a widely known international standard, and it is remarkably succeeded in digital video signal processing rather than digital audio signal processing. There are existing one-chip MPEG decoders, and more various compressed moving picture media using MPEG compressing method will be developed. are existing one-chip MPEG decoders, and more various compressed moving picture media using MPEG compressing method will be developed.
FIG. 1
is a block diagram showing a decoding process of a MPEG decoder.
In variable length decoding (
101
), variable length coded DCT coefficient(Discrete Cosine Transform coefficient) is decoded.
Inverse scanning (
102
) is a procedure of converting a decoded one-dimensional DCT coefficient to a two-dimension form using a zig-zag or alternative scanning method. Any other scanning method can be also used.
Inverse quantization(
103
) is the procedure for getting inverse-quantized DCT coefficients, and includes saturation and mismatch control algorithm. Since MPEG only specifies requirements for decoding, not for encoding, saturation and mismatch control algorithms are meant to prevent accumulation of errors in case of mismatch between DCT of encoder and IDCT of decoder.
DCT coefficients produced in inverse quantization process(
103
) go through an IDCT process, and are fed to motion compensation process (
105
). Motion compensation process uses motion vector to improve efficiency of prediction. Motion vector is offset of previous or next reference field or frame.
IDCT of MPEG2 can be expressed in the following equation (1).
x
(
i
,
j
)
=
2
N
∑
U
=
0
N
-
1
∑
v
=
0
N
-
1
C
(
u
)
C
(
v
)
X
(
u
,
v
)
cos
(
2
i
+
1
)
u
π
2
N
cos
(
2
j
+
1
)
v
π
2
N
c
(
u
,
v
)
=
(
1
2
(
if
u
,
v
=
0
)
,
1
(
otherwise
)
)
[
Equation
1
]
where
x(i, j) (i, j=0, 1, 2, . . . , N−1) are pixel data, X(u, v) (u, v=0, 1, 2, . . . , N−1) are inverse quantized DCT coefficients.
In equation 1, N
4
multiplications are needed to carry out a two-dimensional IDCT.
Since multiplier takes a lot of space in actual hardware and multiplication takes more clocks, this problem should be required to be solved.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an alternative solution to overcome the above described disadvantages that substantially obviates one or more of the problems caused by limitations and disadvantages of the related arts.
This invention reduces the number of multipliers to N/4 and the number of accumulators to N/2 by using the symmetry property of N×N IDCT kernel matrix without any loss of operation speed.
To achieve the above object and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, an inverse discrete cosine transformer in an MPEG decoder includes: a memory storing an absolute value of an element of an IDCT kernel matrix; N/4 multipliers having an element of DCT coefficient matrix or transposed one-dimensional DCT coefficient matrix as a multiplicand and an element of the IDCT kernel matrix as a multiplier; N/2 accumulators accumulating outputs of the multipliers; transposing means transposing outputs of the accumulators to generate the one-dimensional IDCT coefficient matrix or a two dimensional IDCT coefficient matrix.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention maybe realized and attained as particularly pointed out in the appended claims.
REFERENCES:
patent: 5029122 (1991-07-01), Uetani
patent: 5596518 (1997-01-01), Toyokura et al.
patent: 5671169 (1997-09-01), Huang
patent: 5995990 (1999-10-01), Henry
patent: 6167092 (2000-12-01), Lengwehasatit
patent: 6185595 (2001-02-01), Hori et al.
Birch & Stewart Kolasch & Birch, LLP
LG Electronics Inc.
Mai Tan V.
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