Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2001-02-27
2004-05-11
Mai, Tan V. (Department: 2124)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
06735609
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an inverse discrete-cosine transform apparatus for transforming input discrete cosine coefficients to inverse discrete-cosine coefficients.
An inverse discrete-cosine transform apparatus is incorporated into an image-decoding apparatus that is designed to decode compressed image data. In the image-decoding apparatus, the inverse discrete-cosine transform apparatus transforms image data provided in the form of discrete-cosine coefficients, into inverse discrete-cosine coefficients.
More precisely, the inverse discrete-cosine transform apparatus transforms input coefficients, in units of discrete-cosine blocks, thereby to generate image data. Each discrete-cosine block is, for example, an 8×8 matrix that is composed of discrete-cosine coefficients arranged in rows and columns.
Discrete-cosine coefficients can be transformed to inverse discrete-cosine coefficients by applying the following equation (1) of inverse transform:
S
xy
=
∑
u
=
D
7
∑
v
=
D
7
C
u
C
v
D
uv
cos
(
2
x
+
1
)
u
π
16
cos
(
2
y
+
1
)
v
π
16
{
Cu
=
Cv
=
1
2
u
=
v
=
0
Cu
=
Cv
=
1
u
,
v1
,
2
…
,
7
(
1
)
where D
uv
is the discrete-cosine coefficients, i.e., the elements of a discrete-cosine block, S
xy
is pixel data. In the symbol D
uv
, and v indicate the horizontal component and vertical component of the discrete-cosine block, respectively. Similarly, in the symbol, x and y indicate the horizontal component and vertical component of the pixel data, respectively.
As seen from the equation (1), the inverse discrete-cosine transform can be accomplished by performing matrix calculus on discrete-cosine coefficients and inverse discrete-cosine coefficients. Hence, the inverse discrete-cosine transform apparatus may have a matrix algebraic circuit that comprises multipliers and adders. In this case, the apparatus can effect inverse discrete-cosine transform on an input image of standard resolution or high resolution, which has been subjected to discrete-cosine transform, thereby to generate image data that has the same resolution as the input image.
To provide such a matrix algebraic circuit, various methods have been devised. Each method is designed to reduce the number of operations that the matrix algebraic circuit needs to perform. In November 1984 Mr. Beyong Gi Lee published a fast cosine transform (FCT) algorithm in IEEE Transaction on Acoustics, Speech and Signal Processing, Vol. 32, No. 6, pp. 1243. This algorithm describes a method of reducing the number of necessary operations. A circuit, designed totally on the basis of the algorithm, has been developed.
Thus, a fast algorithm optimal for an inverse discrete-cosine transform of discrete-cosine blocks of a specific size, for example 8×8 inverse discrete-cosine blocks, may be formulated and applied. Then, it is possible to provide a small, high-speed matrix algebraic circuit.
An inverse discrete-cosine transform apparatus is known which converts a high-resolution image subjected to discrete-cosine transform, to an image having standard resolution. That is, the apparatus accomplishes compression inverse discrete-cosine transform. Japanese Patent Application Publication No. 2000-041261 discloses an inverse discrete-cosine transform apparatus of this type.
Compression inverse discrete-cosine transform may be performed on a discrete-cosine block subjected to discrete-cosine transform in field discrete-cosine mode, thereby providing first pixel data. Further, compression inverse discrete-cosine transform may be carried out on a discrete-cosine block subjected to discrete-cosine transform in frame discrete-cosine mode, thereby providing second pixel data. The first pixel data and the second pixel data, thus provided, inevitably have a phase difference in the vertical direction. If an image-decoding apparatus incorporates an inverse discrete-cosine transform apparatus that effects the same compression inverse discrete-cosine transform on these two discrete-cosine blocks of different types, the quality of the image the apparatus outputs will deteriorated.
In order to eliminate the phase difference in the vertical direction, two types of compression inverse discrete-cosine transform apparatuses have been invented. The first type is a field-mode, compression, inverse discrete-cosine transform apparatus that performs compression inverse discrete-cosine transform on a discrete-cosine block subjected to discrete-cosine transform in field discrete-cosine mode. The second type is a frame-mode, compression, inverse discrete-cosine transform apparatus that divides a discrete-cosine block subjected to discrete-cosine transform in frame discrete-cosine mode, into fields, thereby to accomplish the compression inverse discrete-cosine transform on the discrete-cosine block.
The field-mode, compression, inverse discrete-cosine transform apparatus will be described first, which performs compression inverse discrete-cosine transform on a discrete-cosine block subjected to discrete-cosine transform in field discrete-cosine mode.
The field-mode, compression, inverse discrete-cosine transform apparatus receives an 8×8 discrete-cosine block input in the form of a bit stream. The apparatus then performs inverse discrete-cosine transform on only the lower 4×4 coefficients of the 8×8 discrete-cosine block. In other words, the apparatus performs compression inverse discrete-cosine transform on the basis of four lower points existing in a lower region with respect to both the horizontal and the vertical direction. The field-mode, compression, inverse discrete-cosine transform apparatus can convert one discrete-cosine block to 4×4 pixel data as it carries out the compression inverse discrete-cosine transform.
It will be described how the frame-mode, compression, inverse discrete-cosine transform apparatus divides a discrete-cosine block subjected to discrete-cosine transform in frame discrete-cosine mode, into fields, thereby to accomplish compression inverse discrete-cosine transform on the discrete-cosine block.
As shown in
FIG. 1
, the frame-mode, compression, inverse discrete-cosine transform apparatus receives a bit stream that has been generated by compressing and encoding a high-resolution image. The bit stream is input to the apparatus, in the form of a discrete-cosine block.
First, in Step S
1
, the apparatus performs 8×8 inverse discrete-cosine transform on the discrete-cosine coefficients y of the discrete-cosine block. (Of all discrete-cosine coefficients of the block, only those in the vertical direction are shown as y
1
to y
8
in
FIG. 1.
) As a result, 8×8 pixel data x is decoded. (Of all pixel data items of the block, only those in the vertical direction are shown as items x
1
to x
8
in
FIG. 1.
)
In Step S
2
, the pixel data items are alternately extracted in the vertical direction, thus dividing the 8×8 pixel data into a 4×4 top-field pixel block and a 4×4 bottom-field pixel block, which correspond to pixel blocks obtained by interlaced scanning. More specifically, pixel data items x
1
, x
3
, x
5
and X
7
for the first, third, fifth and seventh horizontal lines, respectively, are extracted and combined, thus forming a pixel block that corresponds to a top field. Pixel data items X
2
, X
4
, X
6
and x
8
for the second, fourth, sixth and eighth horizontal lines, respectively, are extracted and combined, forming a pixel block that corresponds to a bottom field. This process of dividing the pixels of a discrete-cosine block into two pixel blocks that correspond to interlaced-scan pixel blocks is called “field division” (also known as “field separation”).
In Step S
3
, the apparatus carries out 4×4 discrete-cosine transform (DCT4×4) on the two pixel blocks that have been generated by means of field division.
In Step S
4
, the apparatus extracts the hig
Dixit Rajesh Kumar
Goseki Masami
Sato Kazushi
Sugawara Hiroshi
Terao Takao
Frommer William S.
Frommer & Lawrence & Haug LLP
Sony Corporation
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