Inverse assembler with reduced signal requirements with a...

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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Details

C703S028000

Reexamination Certificate

active

06182280

ABSTRACT:

RELATED APPLICATIONS
This application is related to the application “Inverse Assembler with Reduced Signal Requirements using a Trace Listing” that has the H.P. docket number 10981522 and was filed on the same day as this application.
FIELD OF THE INVENTION
The present invention relates generally to electronic test equipment and more particularly to a logic analyzer that can do mnemonic disassembly of the commands of a microprocessor by substituting information from a user defined memory map as a replacement for some of the signals from the microprocessor.
BACKGROUND OF THE INVENTION
Microprocessors are used on circuit boards to control or perform a large variety of functions. One of these functions is the set up and control of application specific integrated circuits (ASIC). The microprocessor controls the ASIC by running a program that is stored or downloaded into memory. The program or firmware that is run on the microprocessor needs to be analyzed to make sure that the program is running correctly. Typically the microprocessor is in its own integrated circuit (IC) connected to the ASIC by the circuit board. Because the microprocessor is in its own IC all of the signals going to and coming from the microprocessor are available for probing by logic analyzers or other test equipment.
A logic analyzer can use the signals coming from the microprocessor to create a listing of mnemonic program code indicative of those signals. This process is called inverse assembly or disassembly and is done by the inverse assembler inside a logic analyzer. This process allows the code to be checked or debugged in its mnemonic form instead of trying to debug the code in hexadecimal or binary format.
There is a trend to incorporate the microprocessor into the ASIC. This reduces the cost of the system by eliminating an IC, reducing signal lines and reducing board real estate by combining or embedding the microprocessor into the ASIC. This embedded microprocessor still needs to have its signals available for analysis so that the program running on it can be analyzed and debugged. One of the limiting factors on an ASIC is the number of pins or signals that are available to enter or exit from the IC package. Currently all the signals for disassembly of the microprocessor program are required to be available external to the ASIC. This consumes more of the available pins or signals of the ASIC than is desired. There is a need to reduce the required number of signals from the embedded microprocessor to allow for disassembly of those signals into the program used to run the microprocessor.
SUMMARY OF THE INVENTION
The present invention provides an inverse assembler that uses a memory map as a substitute for some microprocessor status signals. This reduces the number of signals needed from a microprocessor to perform disassembly.


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Strassberg, “Logic analyzers stamping out bugs”, EDN, Apr. 1997, pp 73-84.
Schpike, “Design embedded systems for probing” Test & measurement world, Nov. 1997, pp 55-58.
Woodward, “PC systems transform debugging tools”, EE times, Apr. 1998, pp 94.

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