Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
2002-02-05
2002-12-17
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C438S200000, C438S237000
Reexamination Certificate
active
06495391
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates generally to image sensing devices and more particularly to image sensing devices built using CMOS fabricating processes.
(2) Description of Prior Art
State of the art CMOS image sensors often use junction photodiodes as light detection devices. Photons creating charge carriers within an effective region, about the p-n junction of the photodiode, give rise to current and can thus be detected. The effective region essentially consists of the depletion region and the regions that are within a minority carrier diffusion length of the depletion region on either side of the junction. However, charge carriers are also generated thermally and those generated within the effective region give rise to current even in the absence of light. To optimize the photodiode sensitivity it is necessary to minimize this dark current, which can be accomplished, by minimizing the thermal charge carrier generation rate. Imperfections and impurities give rise to increased thermal generation rates and these are more prevalent in the vicinity of surfaces and interfaces. This is because defects can arise from stresses found near surfaces and interfaces and also from process steps, such as ion implantation, that can cause damage near surfaces and interfaces. Also impurities can be introduced through surfaces during processing. Stress induced dark currents are particularly enhanced near corners and edges where the stress is enhanced. Particularly, excess leakage currents are prevalent injunctions of source/drain regions, arising from defects in the vicinity of gate structures where processing of the gate and spacers can induce damage near the silicon surface.
The structure of a photodiode and connected reset transistor of a conventional CMOS image sensor is shown in
FIGS. 1A and 1B
, which show a cross-section and top view, respectively. A p-type region,
10
, is provided, which could be a p-well formed in an n-type semiconductor substrate, or a p-type semiconductor substrate. A field oxide,
14
, is grown, delineating an active area which will contain the photodiode and n-channel MOSFET reset transistor of an image sensor and provide electrical isolation. A gate oxide,
12
, is grown over the active area. Next the n-channel FET, which often has an LDD (lightly doped drain) structure, and the photodiode are formed. A polysilicon gate,
16
, is formed dividing the available area into a smaller part that will contain a source/drain region and a larger part to contain a source/drain region and a photodiode. After a shallower, lower dose implant forming n-regions in both parts, self-aligned to the polysilicon gate electrode, oxide spacers,
18
, are formed on the gate electrode. A deeper, higher dose implant is self-aligned to the oxide spacers to form n+-regions, in both parts, below, but abutting, the n-regions, which completes the formation of the LDD source,
22
, and drain,
20
, regions. A deeper implant is then performed to complete the n-type region of the photodiode,
24
, which is continuous with the source,
22
. Region
42
is a contact region. Finally a transparent insulating layer
26
, such as BPTEOS, is deposited to passivate the structure.
Conventional photodiodes, such as depicted in
FIGS. 1
a
and
1
b
, can be affected by imperfections that give rise to excessive dark current. Defects resulting from the ion implantation steps are not removed in subsequent processing steps, because after the source/drain regions are formed temperatures are kept low. This can result in excessive junction leakage, especially where the junction intercepts the surface. The vicinity of the spacer edge is especially susceptible to process induced imperfections, as is the vicinity of the bird's beak at the field oxide edge. If the photodiode depletion region or the source region of the reset transistor intersect the vicinity of the spacer edge or the field oxide edge, as occurs for the conventional diode, such as shown in
FIGS. 1
a
and
1
b
, then excessive dark current can result. Since the source region of the reset transistor is continuous with the photodiode and they are thus electrically united, current leakage across the source junction is equivalent to leakage across the photodiode junction. In either case excessive leakage could result in what is called white pixels.
U.S. Pat. No. 5,939,742 to Yiannoulos discloses structures for MOSFET phototransistors, some of which place the photodiode under field oxide. This is preferable as it leads to reduced dark current. However, source regions of reset transistors are placed so that the junction is just below the field oxide edge, under the bird's beak, and the edge of the gate structure. These regions are most susceptible to process induced defects and consequently to excess junction leakage. Lee et al. in U.S. Pat. No. 5,625,210 discloses structures for active pixel sensors utilizing pinned photodiodes and combining CMOS and CCD technologies. The sources of leakage current, which is the concern of the invention are not eliminated in the photodiodes and reset transistors disclosed in the Lee invention. U.S. Pat. No. 6,169,318 to McGrath discloses a pixel design for a CMOS image sensor with improved quantum efficiency. The sources of leakage current, which is the concern of the invention are not eliminated in the photodiodes and reset transistors disclosed in the McGrath invention. U.S. Pat. No. 6,171,882 to Chien et al. teaches a method to prevent plasma damage to photodiodes by utilizing protective layers. This is not a structural modification and does not relate to the sources of leakage related to structural features of conventional photodiodes and reset transistors.
SUMMARY OF THE INVENTION
Accordingly, it is a primary objective of the invention to provide a method of forming an inherently low dark current photodiode appropriate for CMOS image sensors. A connection region placed substantially under the field oxide replaces the source region of the reset transistor. The junction of the connection region, being removed from the edges of the field oxide and gate structures, is relatively free of defects and thus exhibits a substantially reduced leakage current. Forming the connection region and the photodiode implants early in the process; before oxidation steps, polysilicon gate forming, and source/drain implant steps; allows for annealing of defects introduced by the implantation. Placing the photodiode substantially under the field oxide is also to be preferred. Thermal oxidation introduces relatively low stress in the silicon. Overlapping the photodiode implant region with the connection region under the field removes the photodiode depletion region from high stress corners at the field oxide edge.
A method is disclosed for forming an image sensor. In a semiconductor wafer containing a p-type region an n-type connection region is formed within the p-type region. An n-type photodiode region is formed in the p-type region connected to the connection region. A field oxide isolation region is formed, having a part that is over portions of the n-type connection region and the n-type photodiode region,. This part of the field oxide region covers the area where these regions are connected and extends into these regions. The edges of this part of the field oxide region fall within these regions, while leaving a distance between these edges and pn junctions formed by the connection region and the p-type region and the n-type photodiode region and p-type region. A gate oxide is formed over regions not covered by field oxide. An extended gate structure is formed extending from above this part of the field oxide isolation region to a distance beyond the connection region so as to accommodate a channel of an n-channel MOSFET. The drain region of the n-channel MOSFET is formed, with the connection region acting as the source. A blanket transparent insulating layer is deposited.
REFERENCES:
patent: 5625210 (1997-04-01), Lee et al.
patent: 5854100 (1998-12-01), Chi
paten
Ackerman Stephen B.
Chaudhari Chandra
Saile George O.
Taiwan Semiconductor Manufacturing Company
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