Intruder detection system with false-alarm-minimizing circuitry

Details Intruder detection system with false-alarm-minimizing circuitry Intruder detection system with false-alarm-minimizing circuitry

1987-07-27

1988-08-16

Swann, III, Glen R.

Communications: electrical

Condition responsive indicating system

Specific condition

250340, 340529, 340566, 340567, G08B 1321

Patent

active

047647558

ABSTRACT:
An intruder detection system is provided with circuitry for reducing the risk of false alarms from spurious sources. Such circuitry comprises a pulse generator for producing current pulses of predetermined pulsewidth and amplitude each time the output of an intrusion detecting element exceeds or falls belows a preset threshold level, an integrating circuit for integrating the output of the pulse generator, threshold sensing means for activating an alarm when the integrator output exceeds a preset level, and a timing circuit for establishing a predetermined time interval and for discharging the integrating circuit in the event the integrator output fails to exceed such preset level within such predetermined time interval. According to a preferred embodiment, means are provided for resetting the time interval each time the detector output exceeds or falls below the selected threshold level. By selecting a relatively short time interval and by resetting such time interval every time a potential target is detected, certain types of spurious sources are prevented from producing false alarms.

REFERENCES:
patent: 4258255 (1981-03-01), Guscott
patent: 4521768 (1985-06-01), Haran et al.
patent: 4570157 (1986-02-01), Kodaira
patent: 4612442 (1986-09-01), Toshimichi

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