Intrinsic dual gate oxide MOSFET using a damascene gate process

Details Intrinsic dual gate oxide MOSFET using a damascene gate process Intrinsic dual gate oxide MOSFET using a damascene gate process

2007-10-02

2007-10-02

Luu, Chuong Anh (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C257S050000, C257S209000, C257S528000

Reexamination Certificate

active

10329593

ABSTRACT:
Damascene or non-damascene processing when used with a method that includes (a) forming a mask having an opening therethrough on a structure, said opening having sidewalls; (b) implanting an inhibiting species into said structure through the opening so as to form an inhibiting region in said structure; and (c) growing a dielectric layer on the structure in said opening, wherein the inhibiting region partially inhibits growth of the dielectric layer is capable of forming a semiconductor structure, e.g., MOSFET or anti-fuse, including a dual thickness dielectric layer. Alternatively, the dual thickness dielectric can be formed by replacing the inhibiting species mentioned above with a dielectric growth enhancement species which forms an enhancing region in the structure which aids in the growth of the dielectric layer.

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