Intersystem channel paging system having a circuit for executing

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395200, 395425, 3642383, 3642397, 364239, 3642285, G06F 300, G06F 1312

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active

054106559

ABSTRACT:
An apparatus for intersystem I/O channel paging. The I/O channel through an I/O channel adapter provides communication between a central processor, an I/O processor, and a shared electronic storage device. The central processor and I/O processor are each enabled for recognizing specific instructions. The intersystem channel may be implemented in the form of a page chain table. Either process is capable of constructing a page chain table in the shared electronic storage device, upon receipt of appropriate instructions. The central processor or I/O processor signals the I/O channel adapter with identification of a page chain table to select. The I/O channel adapter fetches table entries and executes the table. The I/O channel adapter initiates I/O activity upon execution of the table. The I/O channel is not dependent upon the central processor or I/O processor for fetching or executing instructions, rather it acts independent of the processors once the page chain table is created. Flags set in the table serve as a disconnection mechanism for the I/O channel paging system. The I/O channel paging mechanism may operate synchronously or asynchronously.

REFERENCES:
patent: 4177513 (1979-12-01), Hoffman et al.
patent: 4402046 (1983-08-01), Cox et al.
patent: 4512016 (1985-08-01), Fulcomer, Jr. et al.
patent: 4665483 (1987-05-01), Ciacci et al.
patent: 4777595 (1988-10-01), Strecker et al.
patent: 4881164 (1989-11-01), Hailpern et al.
patent: 5077655 (1991-12-01), Jinzaki
patent: 5123101 (1992-06-01), Sindhu
patent: 5214759 (1993-05-01), Yamaoka et al.
patent: 5218684 (1993-06-01), Hayes et al.
IBM Technical Disclosure Bulletin, vol. 24, No. 9, Feb. 1982, Queueing Sort, by E. W. Emerick and J. H. Kardock, pp. 4452-4453.
IBM Technical Disclosure Bulletin, vol. 23, No. 5, Oct. 1980. Descriptor Access Exceptions, R. L. Hoffman et al, pp. 2057-2061.

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