Interrupt throttling for inter-processor communications

Electrical computers and digital processing systems: interprogra – Interprogram communication using message

Reexamination Certificate

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C719S321000, C710S260000

Reexamination Certificate

active

06931643

ABSTRACT:
Implementation of communication between data processors includes a first task (A) running on a first data processor (11) determining that communication is desired between the first task and a second task (B) running on a second data processor (13). The first data processor interrupts the second data processor if the second task is blocked with respect to communication on a predetermined communication channel. If the second task is not blocked with respect to communication on the predetermined communication channel, the first data processor participates in the desired communication on the predetermined communication channel without interrupting the second data processor.

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