Interrupt system for peripheral controller

Details Interrupt system for peripheral controller Interrupt system for peripheral controller

1981-12-10

1984-06-26

Chan, Eddie P.

Boots, shoes, and leggings

G06F 946, G06F 1516, G06F 304

Patent

active

044569700

ABSTRACT:
An interrupt network whereby, upon completion of a data transfer cycle between a host computer and peripheral-controller or completion of a data transfer cycle between a peripheral terminal and peripheral-controller, the peripheral-controller is placed in an interrupt mode (background mode) and institutes an interrupt service routine. The normal mode data in the peripheral-controller is stored for re-use upon return to normal mode.

REFERENCES:
patent: 4038642 (1977-07-01), Bouknecht et al.
patent: 4246637 (1981-01-01), Brown et al.

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