Interrupt information interface system

Details Interrupt information interface system Interrupt information interface system

1973-08-27

1976-12-21

Springborn, Harvey E.

Communications: electrical

Digital comparator systems

G06F 300

Patent

active

039991652

ABSTRACT:
Interrupt signals are set into interrupt level memory registers each of which is provided for each interrupt level, and an interrupt receiving register having a number of bits equal to the number of interrupt level memory registers is disposed within an LSI computer. Transmission of interrupt information from the interrupt level memory registers to the receiving register is effected through a single interface line in synchronism with clock pulses.

REFERENCES:
patent: 3380042 (1968-04-01), Townsend et al.
patent: 3395394 (1968-07-01), Cottrell, Jr.
patent: 3599162 (1971-04-01), Byrns et al.
patent: 3629852 (1971-12-01), Thexton
patent: 3665405 (1972-05-01), Sanders
patent: 3755787 (1973-08-01), Heneger
patent: 3794970 (1974-02-01), Pearson et al.

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