Interrupt coprocessor configured to process interrupts in a comp

Details Interrupt coprocessor configured to process interrupts in a comp Interrupt coprocessor configured to process interrupts in a comp

1995-11-20

1998-03-10

Harrity, John E.

Boots, shoes, and leggings

395733, 3642286, 364DIG1, G06F 100

Patent

active

057272271

ABSTRACT:
A computer system employing an interrupt coprocessor is provided. The interrupt coprocessor is signaled by an interrupt controller to service a particular interrupt request. The interrupt coprocessor may include limited functionality, such that if a particular interrupt request is beyond the capabilities of the interrupt coprocessor, the microprocessor is interrupted. Context saves may be avoided in the interrupt coprocessor. Interrupt latency is reduced, as well as interruption of one or more main microprocessors in the computer system. Several embodiments are shown with a range of interrupt servicing capabilities. A data pump is shown, which is configured to transfer data from a source to a destination. A microcontroller is shown, which may manipulate the data as it is moved from source to destination or access the interrupting device to determine the service needed. Finally, a microprocessor similar to the main microprocessors of the computer system is shown. The microprocessor is capable of accessing system resources in a similar fashion to the main microprocessor, and therefore is capable of performing all interrupt servicing functions.

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Intel Corp., "MultiProcessor Specification", Version 1.1 Apr., 1994, pp. 1.1-Glossary 2.
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Intel Corp., "Microprocessor & Peripheral Handbook-vol. I Microprocessor", 1989 pp. 2-259 through 2-277.
Singh et al., "16-Bit and 32-Bit Microprocessors Architecture, Software, and Interfacing Techniques", 1991, pp. 302-305.

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