Interrupt control system having a processor for determining serv

Details Interrupt control system having a processor for determining serv Interrupt control system having a processor for determining serv

1985-10-29

1989-01-17

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1324

Patent

active

047991488

ABSTRACT:
An interrupt control apparatus in a data processing system has a central processing unit (CPU) and a plurality of modules which are connected to a common bus. Interrupt request lines between the modules and the CPU are wired-OR. Each module activates the corresponding interrupt request line upon generation of an interrupt and, at the same time, sets an interrupt flag inherent thereto in an interrupt status table in the main memory. When the interrupt request line is active, the CPU begins to poll the interrupt flags set in the interrupt status table, thereby detecting the module whose interrupt request line is active.

REFERENCES:
patent: 3836889 (1974-09-01), Kotok et al.
patent: 3905025 (1975-09-01), Davis et al.
patent: 4151592 (1979-04-01), Suzuki
patent: 4352157 (1982-09-01), Namimoto et al.
patent: 4420806 (1983-12-01), Johnson, Jr. et al.
patent: 4495569 (1985-01-01), Kagawa
patent: 4628447 (1986-12-01), Cartret et al.
patent: 4630041 (1986-12-01), Casamatta

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