Interprocessor switching network

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370 60, 370 943, H04J 302, H04J 306, H04L 1256

Patent

active

052186024

ABSTRACT:
A digital switching network for providing simultaneous connections among user processors of processor-based communications equipment. The user processors act as originators and destinations of data communications packets. Packet data connections are through node controllers, which communicate with gateways, which are connected to a switching network via packet links. Control messages are communicated between node controllers, gateways, and an interchange control subsystem via various control message links. All control message processing and packet data transmissions are synchronized with a packet frame synchronization signal, and processing tasks performed by each of the network subsystems are pipelined so that they occur simultaneously. Service requests are queued in a central queue in the interchange control system. The synchronization and queueing simplify the control messages that are required to set up and release the connections.

REFERENCES:
patent: 4885739 (1989-12-01), Read et al.

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