Interprocessor priority control system for multivector processor

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364DIG1, 364DIG2, 36423221, 3642281, 364736, 395478, 395481, 395485, G06F 1200, G06F 1516

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056175752

ABSTRACT:
In a multiprocessor computer system, individual vector processors are provided with priority switching signal control circuits, respectively, and a storage control unit incorporating a priority control circuit. Priority bit information is provided for priority circuits incorporated in the storage control unit. Paths for priority switching signal issued in accordance with a number of requests as generated and types of instruction generating the requests are provided between the priority switching signal control circuits and the priority control circuit of the storage control unit, while paths for the priority switching signal as generated are provided between the priority control circuit and all the priority circuits.

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