Electrical computers and digital processing systems: multicomput – Multicomputer data transferring via shared memory
Reexamination Certificate
2011-05-10
2011-05-10
Nguyen, Phuoc (Department: 2443)
Electrical computers and digital processing systems: multicomput
Multicomputer data transferring via shared memory
C709S212000, C709S216000, C711S146000
Reexamination Certificate
active
07941499
ABSTRACT:
A method includes communicating a first message between processors of a multiprocessor system via a coherency interconnect, whereby the first message includes coherency information. The method further includes communicating a second message between processors of the multiprocessor system via the coherency interconnect, whereby the second message includes interprocessor message information. A system includes a coherency interconnect and a processor. The processor includes an interface configured to receive messages from the coherency interconnect, each message including one of coherency information or interprocessor message information. The processor further includes a coherency management module configured to process coherency information obtained from at least one of the messages and an interrupt controller configured to generate an interrupt based on interprocessor message information obtained from at least one of the messages.
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IBM, “Chapter 9. Processor Control,” Power ISA, Book III-E, Version 2.03, Sep. 29, 2006, pp. 599-601.
Bruce Becky G.
Deshpande Sanjay R.
Gala Kumar
Snyder Michael D.
Whisenhunt Gary L.
Freescale Semiconductor Inc.
Nguyen Phuoc
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