Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...
Reexamination Certificate
2001-01-03
2002-08-06
Ta, Tho D. (Department: 2833)
Electrical connectors
Preformed panel circuit arrangement, e.g., pcb, icm, dip,...
With provision to conduct electricity from panel circuit to...
C439S065000, C439S751000, C439S082000
Reexamination Certificate
active
06428329
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to an interposition structure interposed between substrates, and more particularly, to such an interposition structure capable of guiding the insertion of connection pins for electrically connecting the substrates to each other.
(2) Description of the Related Art
With the recent tendency toward higher-density, higher-speed transfer of signals, multilayer substrates have come to be generally used as back panels for computers, servers, exchanges, etc. In cases where a back panel is constituted by a multilayer substrate, however, as the number of layers increases, more restrictions are imposed on the substrate design, making it difficult to freely configure the substrate, as in the arrangement of through holes.
To solve the problem, a method has been proposed in which the back panel is divided into two substrates and the substrates are interconnected by electrically conductive connection pins.
FIG. 19
illustrates, in section, such substrates interconnected by a connection pin.
According to the method, an interposition structure
101
having a through hole
101
a
therein is interposed between upper and lower substrates
102
and
103
constituting a back panel, as shown in
FIG. 19
, and a conductive connection pin
104
is inserted into the through hole
101
a
from above the upper substrate
102
toward the lower substrate
103
, thereby electrically connecting the upper and lower substrates
102
and
103
.
With the conventional method shown in
FIG. 19
, however, to permit the connection pin
104
to be inserted properly, it is necessary that the holes cut in the upper and lower substrates
102
and
103
and the through hole
101
a
, through which the connection pin
104
is inserted, should be positioned in a straight line with high accuracy. Practical difficulty therefore arises in the insertion of the connection pin
104
, on account of dimensional errors of the upper and lower substrates
102
and
103
and the interposition structure
101
caused during the production thereof, positioning errors, etc.
SUMMARY OF THE INVENTION
The present invention was created in view of the above circumstances, and an object thereof is to provide an interposition structure which is interposed between substrates and permits connection pins to be inserted properly even in cases where substrates to be connected or other members have dimensional errors caused during production thereof, positioning errors, etc.
To achieve the object, there is provided an interposition structure which is interposed between substrates and capable of guiding insertion of a connection pin for electrically connecting the substrates to each other. The interposition structure comprises an interposition body made of an insulating material and having a through hole through which the connection pin is inserted, and a positioning protuberance extending outward from the interposition body and received in a recess formed in one of the substrates, wherein an opening of the through hole has a connection pin inlet portion from which the connection pin is inserted, and the connection pin inlet portion is formed such that an inner diameter thereof gradually increases in a direction from an inner part toward an outer open end of the through hole.
The above and other objects, features and advantages of the present invention will become apparent from the following description when taken in conjunction with the accompanying drawings which illustrate preferred embodiments of the present invention by way of example.
REFERENCES:
patent: 5400504 (1995-03-01), Neumann et al.
patent: 6129555 (2000-10-01), Daikuhara et al.
patent: 58-172880 (1983-10-01), None
patent: 60-227372 (1985-11-01), None
patent: 63-301473 (1988-12-01), None
patent: 1-208894 (1989-08-01), None
patent: 4-261087 (1992-09-01), None
patent: 8-185911 (1996-07-01), None
Harigaya Toshiaki
Nagashima Yasuhiro
Nunokawa Chiharu
Orui Kazuya
Shimizu Manabu
Fujitsu Limited
Katten Muchin Zavis & Rosenman
Nguyen Phuongchi
Ta Tho D.
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