Interposer with embedded circuitry and method for using the same

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257697, 257698, 257724, H01L 2302

Patent

active

059733918

ABSTRACT:
An interposer for assembly between an integrated circuit and a circuit panel includes an upper insulation layer and a plurality of upper contact pads arranged in a desired pattern in the upper insulation layer. A plurality of micro-devices are formed between the upper insulation layer and a bottom insulation layer having a plurality of lower contact pads arranged in a desired pattern. The upper and the lower contact pads are selectively and electrically interconnected via the micro-devices. The upper and the lower contact pads are overlaid with solder balls to provide the required electrical connection and mechanical coupling between the interposer, the integrated circuit, and the circuit panel. The interposer is made by forming an array of upper contact pads on a substrate; depositing an upper layer of encapsulant material on the substrate; planarizing the substrate and exposing the array of upper contact pads; forming a micro-device; forming an array of lower contact pads; forming a bottom insulation layer; and exposing at least some of the lower contact pads. According to another embodiment, the interposer includes a plurality of electrically conductive terminals that extend outwardly from the lower contact pads for establishing an electrical connection and a mechanical spring action between the integrated circuit and the interposer, in order to absorb excess contraction or expansion.

REFERENCES:
patent: 4349862 (1982-09-01), Bajorek et al.
patent: 4617730 (1986-10-01), Geldermans et al.
patent: 4782381 (1988-11-01), Ruby et al.
patent: 4939568 (1990-07-01), Kato et al.
patent: 5070317 (1991-12-01), Bhagat
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5148266 (1992-09-01), Khandros et al.
patent: 5174012 (1992-12-01), Hamilton
patent: 5177594 (1993-01-01), Chance et al.
patent: 5258330 (1993-11-01), Khandros et al.
patent: 5282312 (1994-02-01), DiStefano et al.
patent: 5346861 (1994-09-01), Khandros et al.
patent: 5347159 (1994-09-01), Khandros et al.
patent: 5367764 (1994-11-01), DiStefano et al.
patent: 5382827 (1995-01-01), Wang et al.
patent: 5390844 (1995-02-01), DiStefano et al.
patent: 5398863 (1995-03-01), Grube et al.
patent: 5404044 (1995-04-01), Booth et al.
patent: 5414298 (1995-05-01), Grube et al.
patent: 5426072 (1995-06-01), Finnila
patent: 5455390 (1995-10-01), DiStefano et al.
patent: 5477611 (1995-12-01), Sweis et al.
patent: 5489749 (1996-02-01), DiStefano et al.
patent: 5491302 (1996-02-01), DiStefano et al.
patent: 5518964 (1996-05-01), DiStefano et al.
patent: 5525545 (1996-06-01), Grube et al.
patent: 5536909 (1996-07-01), DiStefano et al.
patent: 5783870 (1998-07-01), Mostafazadeh et al.
Shell Case Marketing and Technical Literature, "True Miniature Die Size IC Packaging Solution".
Levine, B. "Chip-Scale, Bare Die Face Challenges", Electronic News Article, vol. 43, No. 2149, Monday, Jan. 6, 1997.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Interposer with embedded circuitry and method for using the same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Interposer with embedded circuitry and method for using the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interposer with embedded circuitry and method for using the same will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-767918

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.