Interposer stacking system and method

Details Interposer stacking system and method Interposer stacking system and method

2008-05-20

2008-05-20

Clark, Jasmine J (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S666000, C257S692000, C257S696000, C257SE25021, C257SE25027, C257SE25006, C257SE25013, C257SE25018, C257SE23085

Reexamination Certificate

active

11452532

ABSTRACT:
The present invention provides a system and method for selectively stacking and interconnecting leaded packaged integrated circuit devices with connections between the feet of leads of an upper IC element and the upper shoulder of leads of a lower IC element while traces that implement stacking-related intra-stack connections between the constituent ICs are implemented in interposers or carrier structures oriented along the leaded sides of the stack and which extend beyond the perimeter of the feet of the leads of the constituent ICs or beyond the connective pads of the interposer. This leaves open to air flow, most of the transit section of the lower lead for cooling, but provides a less complex board structure for implementation of intra-stack connections.

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patent: 2002/0190367 (2002-12-01), Mantz et al.

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