Interposer chip technique for making engineering changes between

Details Interposer chip technique for making engineering changes between Interposer chip technique for making engineering changes between

1987-11-25

1989-02-07

Kucia, R. R.

Electricity: electrical systems and devices

Miscellaneous

174 685, 361416, H05K 118

Patent

active

048035955

ABSTRACT:
Engineering changes in the wiring between semiconductor device chips supported on the same substrate are made using minimum substrate real estate and without the use of engineering change pads or discrete wires by the use of easily modified chip interposers. The interposers are inserted between respective chips and the substrate. The interposers comprise conductive vias and multiple internal wiring planes which are selectively connected to the vias.

REFERENCES:
patent: 4349862 (1982-09-01), Bajorek et al.
patent: 4489364 (1984-12-01), Chance et al.
patent: 4641425 (1987-02-01), Dubuisson
A. Truch, Two-Level Printed Circuit Card, IBM Tech. Disc. Bull., v. 14, #11, Apr. 1972, p. 3482 relied on.
O. R. Abolafia, Chip Interconnection Device, IBM Tech. Disc. Bull., v. 15, #2, Jul. 1972, p. 420 relied on.
Jerry Lyman, Growing Pin Count is Forcing LSI Package Changes, Electronics, Mar. 17, 1977, pp. 86 to 89 relied on.
M. T. McMahon, Semiconductor Device Carrier for Modules, IBM Tech. Disc. Bull., v. 18, #5, Oct. 1975, pp. 1440 & 1441 relied on.
IBM Technical Disclosure Bulletin, vol. 27, No. 8, Jan. 1985, pp. 4672-4673, by J. M. Harvilchuck et al, "Interposed Segmented Chip Carrier".
IBM Technical Disclosure Bulletin, vol. 26, No. 9, Feb. pp. 4590-4591, by I. Feinberg et al, "Interposer for Chip-on-Chip Module Attachment".
IBM Technical Disclosure Bulletin, vol. 24, No. 9, Feb. 1982, pp. 4637-4638, by M. E. Ecker, "Chip Carrier Interface with Signal Path Change Capability".
IBM Technical Disclosure Bulletin, vol. 22, No. 5, Oct. 1979, pp. 1841-1842 by A. H. Johnson et al. "Multilayer Ceramic Fixed Layer Substrate Design".

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