Amplifiers – With semiconductor amplifying device – Including gain control means
Reexamination Certificate
1999-12-17
2002-12-03
Mottola, Steven J. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including gain control means
C330S288000
Reexamination Certificate
active
06489849
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to interpolators, and more particularly, to interpolators having two ranks of transistors and ratiometric control.
2. Description of the Related Art
A variable gain amplifier using a continuously interpolated attenuator includes an attenuator network, a series of transconductance (gm) stages, an interpolator, a main amplifier, and associated support circuitry. The attenuator receives an input signal and generates a series of progressively attenuated signals at a series of tap points. Each gm stage is coupled to one of the tap points to receive one of the attenuated signals. The outputs from the gm stages are connected together and taken to the main amplifier so that the overall output signal is the sum of the output signals from all of the gm stages. The interpolator steers a bias current to the gin stages in response to a control signal such that, when the highest gain is selected, the gm stage closest to the input end of the attenuator is active, and the remaining gm stages are effectively off. As the gain is reduced, the interpolator steers the bias current to gin stages further away from the input end of the attenuator, thereby selecting gm stages that receive progressively attenuated versions of the input signal.
Some examples of interpolators used in variable gain amplifiers having continuously interpolated attenuators are disclosed in U.S. Pat. Nos. 5,684,431 and 5,077,541, both having a common inventor with the present application. Another example of an interpolator is disclosed in U.S. Pat. No. 5,432,478 also having a common inventor with the present application. These patents are incorporated herein by reference.
SUMMARY
In one aspect of the present invention, two ranks of transistors are utilized to generate interpolator currents. An input signal is applied to the first rank of transistors which generate a set of partially switched currents which greatly overlap the currents generated by adjacent transistors. The second rank of transistors spatially amplifies the partially switched currents, thereby reducing the overlap of the currents from adjacent transistors.
REFERENCES:
patent: 5077541 (1991-12-01), Gilbert
patent: 5432478 (1995-07-01), Gilbert
patent: 5684431 (1997-11-01), Gilbert et al.
patent: 6084472 (2000-07-01), Gilbert
patent: 0 317 758 (1989-08-01), None
Analog Devices Inc.
Marger Johnson & McCollom PC
Mottola Steven J.
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