Interpolation delay cell for 2ps resolution jitter injector...

Details Interpolation delay cell for 2ps resolution jitter injector... Interpolation delay cell for 2ps resolution jitter injector...

2005-10-25

2005-10-25

Nguyen, Linh My (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C327S280000

Reexamination Certificate

active

06958640

ABSTRACT:
An apparatus and method for generating signals with improved timing resolution includes a delay cell configured to receive dual coupled differential input signals. The delay cell performs an interpolation function which smooths state transitions or other discontinuities that result from timing or phase offsets between the input signals. The interpolation function is performed by resistors which couple respective components of the differential inputs prior to traversing delay paths. A delay cell of this type has high supply noise rejection and a low output swing range, thereby making it suitable for a number of applications. One application includes a jitter noise generator which uses the delay cell to achieve improved timing resolution and which is not limited by a minimum delay of the cell. Another application uses the delay cell to form a coupled delay line.

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Noda et al. “An On-Chip Timing Adjuster with SUB-100-PS Resolution for a High-Speed DRAM Interface,” 1998 Symposium on VLSI Circuits Digest of Technical Papers, pp. 62-63.
John G. Maneatis “Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques,” IEEE Journal of Solid-State Circuits, vol. 31, No. 11, Nov. 1996, pp. 1723-1732.

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