Interpolation based timing recovery

Details Interpolation based timing recovery Interpolation based timing recovery

2007-04-03

2007-04-03

Payne, David C. (Department: 2611)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C375S220000, C375S221000, C375S260000, C375S352000, C375S354000, C375S371000, C370S401000

Reexamination Certificate

active

10422316

ABSTRACT:
The present invention provides a solution that eliminates both the voltage-controlled oscillator (“VXCO”105) and its associated D/A converter (120) from the timing recovery scheme, thereby significantly reducing manufacturing costs for modems, such as asymmetric digital subscriber loop (“ADSL”) modems. The present invention also enables tracking of a wider frequency offset. The present invention provides this with a novel timing recovery scheme implemented entirely in the digital domain. The present invention includes a free running clock (205) as the sampling clock for the A/D (110) and D/A (115) converters, and interpolators (210, 220, 615and635) to correct timing errors for both the receive and transmit samples. The desired sample can be obtained based on its timing offset and its neighboring samples.

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Evans, Mark, Ultra320 SCSI Meets The Challenges—Technology Information, Computer Technology Review, Jun. 2001, found Jul. 6, 2006 at http://www.findarticles.com/p/articles/mi—m0BRZ/is—6—21/ai—77610586.

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