Internally synchronous matrix structure for use in externally as

Communications: electrical – Continuously variable indicating – With meter reading

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34082584, 3408259, 307465, H04Q 100, G06F 738, H03K 19173

Patent

active

046582533

ABSTRACT:
The speed of operation of a programmable logic device which contains internally synchronous circuit structure is increased by an improved architecture which does not require a power-up transition cycle. Synchronous operation is carried out only for one transition. In each column of the matrix of programmable cells, the rows of which are coupled to receive the logic signals upon which the device is to operate, the programmable cells of that column are coupled via a respective inverter feedback pair to a column output link of the matrix. The connection between the programmable cells of the matrix and the inverter feedback pairs are coupled to pull-down switch devices control inputs of which are coupled to the output of an OR tie, inputs or which depend upon a prescribed transition on row input links. This transition is detected by respective transition detectors which trigger only on a particular transition edge. When the row inputs to the matrix change state, the column outputs follow the transitions asynchronously, with the only delay being that imparted by the inherent delay through the inverter feedback pairs. When the row inputs switch or transition to the opposite state, the transition detector of each row provides an output which, through the OR tie, triggers the pull-down switches. These pull-down switches are capable of overriding the feedback inverter pair to force the column low if it had previously been high and if no other row is holding the column high. For this transition, the matrix operates synchronously.

REFERENCES:
patent: 4577190 (1986-03-01), Law

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