Internally decoupled integrated circuit package

Details Internally decoupled integrated circuit package Internally decoupled integrated circuit package

1990-10-02

1992-03-10

Griffin, Donald A.

Electricity: electrical systems and devices

Electrostatic capacitors

Fixed capacitor

357 74, H01G 114, H01L 2302

Patent

active

050954024

ABSTRACT:
A decoupling scheme is presented which is well suited for use with any type of integrated circuit package. In accordance with the present invention, a flat decoupling capacitor is attached directly to the top of an IC die and is electrically connected to the IC by means of raised conductive bumps provided either on the surface of the decoupling capacitor or on the IC die surface. These conductive bumps interconnect the internal electrodes of the capacitor to the power and ground circuits of the IC. The resulting decoupling scheme provides a decoupling loop with an inductance which is significantly lower than previously disclosed decoupling loops.

REFERENCES:
patent: 4922324 (1990-05-01), Sudo
patent: 4945399 (1990-07-01), Brown et al.
patent: 4989117 (1991-01-01), Hernandez
European Search Report, 5/1991, EP 91 10 0653, Hitachi.
Multilayer Ceramic Capacitors and IC's; E. Philofsky; Electronic Engineering, Jun. 1982.
Functional Testing of Decoupling Capacitors for Dynamic Rams; A. G. Martin; AVX Ceramics & Ward Parkinson; Micron Technology, 1982.

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