Internal voltage generating circuit, semiconductor memory device

Details Internal voltage generating circuit, semiconductor memory device Internal voltage generating circuit, semiconductor memory device

1996-01-17

1998-11-10

Mai, Son

Static information storage and retrieval

Powering

36518909, 327534, 327536, G11C 514

Patent

active

058354344

ABSTRACT:
This substrate voltage generating circuit (internal voltage generating circuit) includes an oscillator, a p channel transistor, an AND circuit, and a pump circuit. The substrate voltage generating circuit is stopped by applying stop signals S and S to the p channel transistor and the AND circuit connected to the oscillator, and by cutting supply of power supply voltage to the oscillator and a path of output of the oscillator. In order to find current consumption at stand-by of a semiconductor memory device, current consumptions of the whole semiconductor memory device at stand-by before and after operation of the substrate voltage generating circuit is stopped as described above are measured, and the difference between them is calculated. Current consumption of the substrate voltage generating circuit is thus found. As described above, the internal voltage generating circuit can be stopped without cutting a wire, thereby allowing measurement of current consumption of the internal voltage generating circuit at stand-by of the semiconductor memory device. As a result, a problem caused by cutting of the wire can be prevented.

REFERENCES:
patent: 5034625 (1991-07-01), Min
patent: 5249155 (1993-09-01), Arimoto et al.
patent: 5295112 (1994-03-01), Taniguchi
patent: 5315166 (1994-05-01), Arimoto
patent: 5396114 (1995-03-01), Lee
German Patent Office Action dated Jul. 17, 1997 and English translation thereof.

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