Electrical transmission or interconnection systems – Switching systems – Plural switches
Reexamination Certificate
2008-06-26
2010-12-28
Fureman, Jared J (Department: 2836)
Electrical transmission or interconnection systems
Switching systems
Plural switches
C307S043000
Reexamination Certificate
active
07859135
ABSTRACT:
A current mirror circuit which is connected to first and second power supplies and generates a desired current, has a plurality of first transistors which are connected in parallel to the first power supply side and the gates of which are connected to a common node, a plurality of second transistors which are cascode-connected to the plurality of first transistors and the gates of which are supplied with a cascode bias potential and a cascode bias generation circuit which generates the cascode bias potential, wherein the cascode bias generation circuit maintains the cascode bias potential during normal operation at a first potential between the potentials of the first and second power supplies, and maintains the cascode bias potential during power-on at a second potential closer to the potential of the second power supply than the first potential.
REFERENCES:
patent: 6052025 (2000-04-01), Chang et al.
patent: 2007/0057727 (2007-03-01), Onishi
patent: 9-062380 (1997-03-01), None
patent: 2001-028188 (2001-01-01), None
patent: 2004-259275 (2004-09-01), None
Sako Atsumasa
Takeuchi Atsushi
Arent & Fox LLP
Fujitsu Semiconductor Limited
Fureman Jared J
Parries Dru M
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